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Motion Control Designs

This is a sample of some of our motion control designs.

Robot Control PCI Express Card

Robot Control PCI Express Card 
Verien has designed three generations of robot control cards and FPGAs for Boston Dynamics - the "brain" for most of their robots.  These are a PCI card and two generations of COM Express (PCI Express in the COM Express form factor) cards. The FPGA (originally a Virtex-5, then a Spartan-6, and now an Artix-7) provides 16 Controller Area Network interfaces which communicate to all of the robot axes, as well as two serial ports, an NVSRAM interface, and an SDLC interface to an Inertial Measurement Unit (IMU), a watchdog timer, and other I/O. A custom DMA engine is used to DMA the CAN and IMU data to host memory across the PCI Express interface.

The Real Time Data Interface 
The RDI is a custom PCI card used for real time distributed motion control systems. Verien created a link protocol which allowed for deterministic latency, as well as the ability to schedule DMA-based real-time transfers. A special clocking scheme is a part of this protocol which allowed nanosecond-class box-to-box synchronization for distributed real-time control operations.  Transfers can be either reliable (acknowledged and retried in hardware) or UDP-style with a sequence number provided at the destination.The RDI card provides four 500 Mbit/sec links for reliable packet communications over CAT cable and eight linked-list DMA engines which allow real-time scheduled transfers.  These communicate to the I/O cards at the end points which read position and other sensor information and drive the motors.  

Motion Control Real Time Data Interface
Robot PCI Card

Controller Area Network PCI Card 
This embedded card provides control for a small robot for a specialized application. It is a 2.5inch x 4.7inch card on which a 500 MHz computer module is mounted. The card provides the physical interface for all of the I/O from the computer module: VGA, serial ports, 3 USB ports, Ethernet, IDE, and I2C. The card also contains an Xilinx FPGA which interfaces from the PCI bus to four Controller Area Network buses. The FPGA contains four separate CAN cores which operate up to 4 Mbps with four acceptance masks/filters for each of the interfaces. Also provided in the FPGA is the ability to generate autonomous CAN cycles based upon a programmable timer. In addition, four switching supplies were required to meet the target efficiency and high current requirements (9v - 50v input with 7A output). Verien provided turnkey design services for this product delivering working prototypes.

Resources

Tech Notes
IP Cores

Contact

Email: info@verien.com 
Phone: 978-405-3102 

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